17–14
Chapter 17: Gate & Control Library
LFSR Sequence
The LFSR Sequence block implements a linear feedback shift register that shifts one bit
across L registers. The register output bits shift from LSB to most significant bit (MSB)
with the output sout connected to the MSB of the shift register. The register output
bits can optionally be XOR ed or XNOR ed together.
For example, when choosing an LFSR sequence of length eight, the default
polynomial is x8 + x4 + x3 + x2 + 1 with the circuitry that Figure 17–8 shows.
Figure 17–8. Default LFSR Sequence Block with Length 8 Circuitry
In this default structure:
The polynomial is a primitive or maximal-length polynomial
All registers are initialized to one
The feedback gate type is XOR
The feedback structure is an external n-input gate or many to one
You can modify the implemented LFSR sequence by changing the parameter values.
For example, after changing the feedback structure to an internal two-inputs gate,
DSP Builder implements the circuitry ( Figure 17–9 ).
Figure 17–9. Internal 2-Input Gate Circuitry
This circuitry changes the sequence from:
1 1 1 1 1 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1
to:
1 1 1 1 0 1 0 0 1 1 0 0 1 1 0 1 0 1 0 0 0
DSP Builder Handbook
Volume 2: DSP Builder Standard Blockset
November 2013 Altera Corporation
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